黃國棟（Kuo-Tung Huang） 

職　　稱：助理教授

分　　機：（02）8209-3211分機5212

電子郵件：kdhuanga@mail.lhu.edu.tw

學　　歷：國立中山大學電機工程研究所博士

擔任課程： 微積分 數學

研究領域：半導體元件物理、半導體製程、電路佈局效應, 單電子電晶體

研究成果：

國際期刊

1. Jyi-Tsong Lin, and Kuo-Dong Huang, “A High Performance Polysilicon Thin-Film Transistor Built on a Trenched Body”, IEEE Trans. Electron Devices, Feb. 2008. (Accepted)
2. Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu, “Non-Classical Polycrystalline Silicon Thin-Film Transistor with Embedded Block-Oxide for Suppressing the Short Channel Effect”, Semicond. Sci. Technol., vol. 23, Feb. 2008, 075007(6pp).
3. Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu, “The Effect of a Smart Body Tie on the Bottom Gate Thin Film Transistor”, Solid-State Electronics, vol. 52, Feb. 2008, pp.808-812.
4. Jyi-Tsong Lin, and Kuo-Dong Huang, “Non-classical polysilicon thin-film transistor with symmetric trenched body”, Electronics Letters, vol. 43, no. 24, Nov. 2007, pp. 1390-1392.
5. Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu, “The Effect of N-Channel Polysilicon Thin-Film Transistors with Body-Block Spacers”, Solid-State Electronics, vol. 51, Feb. 2007, pp.1056-1061.
6. Jyi-Tsong Lin, Kuo-Dong Huang, Chu-Lun Wu, “An Alleviated Self-heating Poly-Si Thin-Film Transistor Built on Non-continuing Buried Insulator”, Electrochemical and Solid-State Letters, 10 (3), Jan. 2007, pp. H107-H110.
7. Jyi-Tsong Lin, Kuo-Dong Huang, and Shih-Tsong Lin, “A Kink-Free Bottom Gate Poly-Si Thin-Film Transistor with Smart Body Tie”, ECS Transactions, 2 (26), 2007, pp. 1-7.
8. Shu-Fen Hu, Kuo-Dong Huang, Yue-Min Wan, Chin-Lung Sung, “Proximity effect of electron beam lithography on single-electron transistors”, Pramana - Journal of Physics, vol. 67, no. 1, 2006, pp. 57-65.
9. Yue-Min Wan, Kuo-Dong Huang, S. F. Hu, C. L. Sung, and Y. C. Chou, “Coulomb blockade oscillations in ultra-thin gate oxide silicon single-electron transistors”, Journal of Applied Physics, vol. 97, no. 11, 2005, pp. 116106.
10. Shu-Fen Hu, Kuo-Dong Huang, Chin-Lung Sung, Yue-Min Wan, “Proximity effect of electron beam lithography for single-electron transistor fabrication”, Applied Physics Letters, vol. 85, no. 17, Oct. 25, 2004, pp. 3893-3895.

國內期刊

1. Shu-Fen Hu, Kuo-Dong Huang, Chin-Lung Sung, Yue-Min Wan, “點接觸式單電子電晶體之製作與分析”, 奈米通訊, vol. 11, no. 4, pp. 1-5, 2004.

國際會議

1. Jyi-Tsong Lin, Kuo-Dong Huang, "A Novel Polysilicon Thin-Film Transistor with Multi-Trenched Body for Suppressing Off-State Leakage," IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), Dec. 20-22, 2007, Tainan, Taiwan.
2. Jyi-Tsong Lin, Kuo-Dong Huang, "A Non-Classical Polysilicon Thin-Film Transistor with Symmetric Trenched Body," International Electron Devices and Materials Symposia (IEDMS), Nov. 30-1, 2007, Hsinchu, Taiwan.
3. Jyi-Tsong Lin, Kuo-Dong Huang, Shih-Tsong Lin, Shu-Fen Hu, Chin-Lung Sung, Ya-Chang Chuo and Pei-jiun Yen, “Fabrication of the Bottom Gate Thin Film Transistor with Smart Body Tie”, International Electron Devices and Materials Symposia (IEDMS), Dec. 7-8, 2006, Tainan, Taiwan.
4. Jyi-Tsong Lin, Kuo-Dong Huang, Shih-Tsong Lin, Chu-Lun Wu, Chin-Lung Sung, Ya-Chang Chuo and Pei-jiun Yen, "Fabrication of Polysilicon Thin-Film Transistor Built on Poly Buffer LOCOS," International Electron Devices and Materials Symposia (IEDMS), Dec. 7-8, 2006, Tainan, Taiwan.
5. Jyi-Tsong Lin, and Kuo-Dong Huang, “The Fabrication of Block-Oxide Thin-Film Transistor with Superior Subthreshold Characteristics”, International Symposium on Nano Science and Technology (ISNST), Nov. 2006, Tainan, Taiwan.
6. Jyi-Tsong Lin, Yi-Chuen Eng, Tai-Yi Lee, Kao-Cheng Lin, and Kuo-Dong Huang, “High Performance Thin-Film Transistor with L-Shaped Block Oxide”, 8th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), October 23-26, 2006, Shanghai, China.
7. Yi-Chuen Eng, Jyi-Tsong Lin, Kuo-Dong Huang, Tai-Yi Lee, and Kao-Cheng Lin, “An investigation of the effects of Si thickness-induced variation of the electrical characteristics in FDSOI with block oxide”, 8th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct 23-26, 2006, Shanghai, China.
8. Jyi-Tsong Lin, Yi-Chuen Eng, Kuo-Dong Huang, Tai-Yi Lee, and Kao-Cheng Lin, “Ultra-Short-Channel Characteristics of Planar MOSFETs with Block Oxide”, 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), July 3-7, 2006, Meritus Mandarin, Singapore.
9. Jyi-Tsong Lin, Yi-Chuen Eng, Kuo-Dong Huang, Tai-Yi Lee, and Kao-Cheng Lin, “A Novel FDSOI MOSFET with Block Oxide Enclosed Body”, International Conference on IC Design & Technology, May 24-26, 2006, Padova, Italy.
10. Jyi-Tsong Lin, Yi-Chuen Eng, Tai-Yi Lee, Kao-Cheng Lin, and Kuo-Dong Huang, “A Impact of Block Oxide on 50 nm Gate Length Planar MOSFETs”, International Conference on IC Design & Technology, May 24-26, 2006, Padova, Italy.
11. Jyi-Tsong Lin, Kuo-Dong Huang, Shih-Tsong Lin, “A Novel Bottom Gate Polysilicon Thin-Film Transistor with Smart Body Tie”, in IEEE 25th International Conference on Microelectronics (MILE), May 14-17, 2006, Belgrade, Serbia and Montenegro.
12. Kuo-Dong Huang, Jyi-Tsong Lin, Shu-Fen Hu and Chin-Lung Sung, “The Fabrication of Single Electron Transistor by Polysilicon Thin Film and Point-Contact”, in IEEE 25th International Conference on Microelectronics (MIEL), May 14-17, 2006, Belgrade, Serbia and Montenegro.
13. Jyi-Tsong Lin, Kuo-Dong Huang and Shih-Tsong Lin, “A Kink-Free Bottom Gate Poly-Si Thin-Film Transistor with Smart Body Tie,” in 209th Meeting of The Electrochemical Society (ECS), 601, 17, May 7-12, 2006, Denver, Colorado USA.
14. Yue-Min Wan, Kuo-Dong Huang, Ching-Lung Sung, and Shu-Fen Hu, “Transport properties of ultra thin oxide gated Si SET near room temperature”, Proceedings of 5th IEEE Conference on Nanotechnology, July 11-15, 2005, Nagoya, Japan.

國內會議

1. Jyi-Tsong Lin, Kuo-Dong Huang, and Bao-Tang Jheng, “A High Performance Thin-Film Transistor Built on Block-Oxide N-Channel Polycrystalline Silicon”, 2008 Symposium on Nano Device Technology, May 2008, Hsinchu, Taiwan.
2. Jyi-Tsong Lin, Kuo-Dong Huang, and Bao-Tang Jheng, “Trenched Body Technology for Use to Suppress Leakage Current in a Ploy-TFT”, in 2008 Microelectronics Technology and Applications Conference, May 16, 2008, Kaohsiung, Taiwan.
3. Jyi-Tsong Lin, Kuo-Dong Huang, and Yu-Chi Kang, “A High Performance Thin-Film Transistor Built on Block-Oxide N-Channel Polycrystalline Silicon”, 2007 Symposium on Nano Device Technology, May 2007, Hsinchu, Taiwan.
4. Jyi-Tsong Lin, Kuo-Dong Huang, and Chu-Lun Wu, “A Kink-Free Polysilicon Thin-Film Transistor Built on Local Oxidation of Silicon (LOCOS)”, 2006 Symposium on Nano Device Technology, May 2006, Hsinchu, Taiwan.
5. Jyi Tsong Lin, and Kuo-Dong Huang, “Single Electron Device Operated in Room Temperature”, 2005 Symposium on Nano Device Technology, May 2005, Hsinchu, Taiwan.
6. Yue-Min Wan, Kuo-Dong Huang, C. L. Sung and S. F. Hu, “Transport Properties of Point-Contact Si SET near Room Temperature”, 中華民國物理學會年會暨研究成果發表會, Feb. 2005, Sun Yat-Sen Univ., Taiwan.
7. Kuo-Dong Huang, Yue-Min Wan, S. F. Hu and C. L. Sung, “Single Electron Transistor of Silicon Based Point-Contact Tunnel Junction”, 2004 Symposium on Nano Device Technology, May 2004, Hsinchu, Taiwan.

專利

1. Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu, “Single Electron Transistor and Method for Manufacturing the Same”, patent for republic of china I 251934, 21 March, 2006.
2. Jyi-Tsong Lin, Kuo-Dong Huang, and Yi-Chuen Eng, “Transistor Device with p-gate and Method for Manufacturing the Same”, patent for republic of china I 248663, 1 Feb. 2006.
3. Jyi-Tsong Lin, Kuo-Dong Huang, and Kao-Cheng Lin, “Trench SOI-DRAM Cell and Method for Manufacturing the Same”, patent for republic of china, Sep. 2006. (pending)
4. Jyi-Tsong Lin, Kuo-Dong Huang, and Ho-Ting Chen, “SOI Device with Pseudo Gate-all-around and the Method for Making the Same”, patent for republic of china, Sep. 2006.